THIS INVENTION relates to a method of fabricating semiconductor structures and more particularly to a method of forming nickel-platinum monosilicide on a silicon semiconductor device.
Silicide processes are used in the manufacture of large-scale integrated silicon circuit devices to provide a silicide layer with low sheet resistance on a silicon semiconductor structure or device.
Typically, the surface of a silicon semiconductor or device is adjoined by regions of silicon and regions of insulating materials like silicon oxide, silicon nitride, silicon oxynitride and aluminium oxide. A film is deposited on the surface of the silicon semiconductor structure or device using conventional deposition techniques such as sputtering, electron-beam evaporation, or filament evaporation. The film can be deposited by sputtering an alloy target or by co-sputtering two or more pure targets. Once the film has been deposited on the silicon layer, the semiconductor device is annealed using a rapid thermal annealing process. The annealing process forms a silicide film in the silicon regions as a result of the reaction between the deposited film and the underlying silicon layer.
The most commonly used material for creating a silicide layer is titanium. The resultant titanium silicide layer (titanium disilicide) has a substantial drawback. That drawback is the high sheet resistance encountered when using narrow line widths. The increase in sheet resistance with decreasing line widths is due to the lack of the nucleation centres for the low resistive C54 phase during the phase transition from C49 phase to C54 phase.
The increase in sheet resistance as a result of decreasing line widths is not an issue for cobalt disilicide which is also used to form a silicide layer. However, cobalt disilicide suffers from other drawbacks such as a severe junction leakage current, a relatively large consumption of silicon and the difficulty of achieving a disilicide layer of uniform thickness. The use of cobalt disilicide in ultra-shallow junction devices would not, therefore, be appropriate.
Nickel monosilicide can also be used in the silicide process because it has a low electrical resistivity (in the order of 14 xcexcxcexa9 cm), a low consumption of silicon atoms and the ability to maintain low resistivity even for narrow line widths down to 0.1 xcexcm. In addition, the use of nickel monosilicide allows the thickness of the silicide film to be determined more accurately because of the absence of any reaction between the nickel and the annealing ambient gas (typically nitrogen). There are problems with the use of nickel monosilicide because it is not thermally stable at relatively high processing temperatures. For example, agglomeration is observed at temperatures below 600xc2x0 C. and transformation of monosilicide structures to disilicide structures with higher electrical resistivity was found below 700xc2x0 C.
These problems can, however, be solved by adding small amounts of alloying elements such as platinum into the nickel. For example, the addition of 5% platinum into a nickel film layer can increase the disilicide nucleation temperature to 900xc2x0 C. and the agglomeration temperature to 750xc2x0 C. or above whilst the silicide resistivity remains almost the same as that of pure nickel monosilicide.
There is unfortunately also a drawback to the use of nickel-platinum monosilicides. When nickel-platinum monosilicides are applied to ultra large-scale integrated circuits, the formation of nickel and platinum related defects is noted. The formation of these defects is inevitable because both nickel and platinum have relatively high solubility in silicon and diffuse very quickly, even at relatively low temperatures. The formation of electrically active defects from the nickel and platinum establishes recombination and generation centres which have a detrimental effect on the performance of the resultant semiconductor devices. For example, the leakage currents through p/n junctions of source/drain regions of a field effect transistor can become unacceptably high if the formation of the nickel and platinum related defects is not controlled.
It is an object of the present inventions to provide a method of fabricating a nickel-platinum monosilicide on a silicon semiconductor whilst controlling the formation of nickel and platinum related defects to an acceptable level.
It is a further object of the present invention to provide a method of fabricating a nickel-platinum monosilicide on a semiconductor structure to produce a semiconductor device having a low leakage current.
Accordingly, one aspect of the present invention provides a method of fabricating a silicide layer on a silicon region of a semiconductor structure, the method comprising the steps of: providing a semiconductor structure having at least one silicon region on a surface thereof; depositing a layer of nickel and platinum on the at least one silicon region; annealing the semiconductor structure and the nickel/platinum layer to react the nickel and the platinum with underlying silicon to form a nickel-platinum silicide, wherein the annealing step takes place at temperature of between 680xc2x0 C. and 720xc2x0 C.
Advantageously, the annealing temperature is 700xc2x0 C.
Preferably, the nickel/platinum layer is deposited by sputtering a nickel/platinum alloy target.
Alternatively, the nickel/platinum layer is deposited by co-sputtering a pure nickel target and a pure platinum target.
Further, in the alternative, the nickel/platinum layer is deposited by the sequential deposition of nickel and platinum.
Conveniently, any excess nickel/platinum which has not reacted with the silicon region is removed from the semiconductor device.
Advantageously, the nickel/platinum layer has a nickel content of between 90 and 99% and a platinum content of between 1 and 10%.
Preferably, the nickel content is 95% and the platinum content is 5%.
Conveniently, the annealing atmosphere is a nitrogen atmosphere or an argon atmosphere.
Alternatively, the annealing step occurs in a vacuum.
Another aspect of the present invention provides a semiconductor structure having a silicon region and a nickel-platinum silicide layer formed thereon, the silicide layer having been formed by annealing the semiconductor structure coated with a layer of nickel and platinum to react the nickel and the platinum with underlying silicon, wherein the annealing temperature is between 680xc2x0 C. and 720xc2x0 C.